The present invention relates generally to fabrication of integrated circuit devices and, more particularly, to methods for forming cell nitride layers and capacitors, and capacitor constructions.
Nitride layers are frequently used in the fabrication of semiconductor wafers, for example, in the fabrication of MOSFET gates, memory cells, and capacitors. The nitride layers are utilized as an insulation layer over silicon surfaces to electrically isolate conductive components of a semiconductor circuit from one another. Nitride films are also used as a diffusion barrier to protect regions of a semiconductor wafer during local oxidation of silicon. In a capacitor, a dielectric nitride layer typically separates the upper and lower conductive plates or electrodes.
Various processes are used to produce a nitride layer. One method is by rapid thermal nitridation (RTN), which comprises annealing a silicon layer in an NH3 or other nitrogen-containing gas that reacts with the silicon to produce silicon nitride. However, the growth of the nitride layer is extremely slow and self-limiting since the NH3 or other nitrogen-containing gas is not capable of adequately diffusing through the growing silicon nitride layer to react with the underlying silicon. The ultimate thickness of a silicon nitride film produced by nitridation is typically only 3 to 4 nm at high temperatures. Such thickness is usually too low to adequately function as a barrier to prevent further oxidation of the silicon surface during subsequent processing, or as a capacitor dielectric layer between two conductive capacitor plates
Surface properties of the wafer surface play an important role in the initial growth of cell nitride films in thin-film processes, which will impact the properties and structure of the thin film that is deposited. Different nucleation and deposition rates occur for the deposition of nitride on different wafer surfaces. This leads to different or degraded electrical characteristics of semiconductor devices having different wafer surfaces that are fabricated using a nitride deposited layer. In addition, deposition of nitride also includes an incubation time at the start of the deposition where there is no apparent deposition of nitride. The incubation time may extend up to several minutes for some surfaces. Surfaces exhibiting such different rates and incubation times include, for example, borophosphosilicate glass (BPSG), silicon, polysilicon, hemispherical grain (HSG) polysilicon, other doped silicon or polysilicon surfaces, other doped oxides, among others.
An example of a prior art process for forming a DRAM container capacitor is described with reference to FIGS. 1A-1B. Referring to FIG. 1A, an exemplary semiconductor wafer fragment 10, shown in a preliminary processing step, comprises a substrate 12, an insulative layer 14 of borophosphosilicate glass (BPGS) formed over the substrate, an opening 16 patterned and etched into the BPSG layer 14, and a hemispherical grain (HSG) polysilicon layer 18 formed over the BPSG insulative layer 14 as a bottom electrode or plate of a storage capacitor. As shown in FIG. 1B, a nitride dielectric layer 20 is deposited over the HSG silicon layer 18 and the exposed surfaces of the BPSG layer 14. The dielectric layer 20 will typically comprise silicon nitride (Si3N4) and/or silicon oxide (SiO2), with Si3N4 being generally preferred due to its higher dielectric constant.
Problems have been encountered in connection with the thickness of the cell nitride layer due to the poor nucleation of cell nitride on BPSG and other insulating materials that form the walls of the container capacitor. Due to the poor nucleation, the cell nitride layer on the insulating (BPSG) layer 14 is substantially thinner than on the overlying electrode layer 18 which can comprise a conductive or semiconductive material such as HSG silicon, which is receptive to nitridation. The non-uniformity of the nitride film deposited on various surfaces is caused by the different surface energies of the different substrates. Consequently, in a subsequent cell nitride wet re-oxidation step, the thin nitride layer on the insulating (BPSG) material cannot prevent the electrode (HSG silicon) layer from oxidation, which causes problems with xe2x80x9cpunch throughxe2x80x9d of the nitride layer, which diminishes the function of the capacitor. Also as a result of the poor nitride nucleation on the insulating material (e.g., BPSG), a very thin nitride layer is formed at the top corner area 22 of the container where the electrode (e.g., HSG silicon) intersects with the container wall and the insulating (BPSG) material is exposed. This results in high leakage, i.e., xe2x80x9ccorner leakage,xe2x80x9d between the bottom electrode and the top cell plate. Thus, due to the poor nucleation of cell nitride on the insulating (BPSG) material, problems have been encountered with reducing the thickness of cell nitride layers to below 50 angstroms in the manufacture of container capacitors.
A method for forming a uniform nitride layer over different substrate materials is disclosed in U.S. Pat. No. 6,235,571 (Doan), which describes forming a uniform dielectric film layer over a bottom electrode comprising a nitridation receptive material and an insulating material comprising a nitridation resistive material in a storage capacitor fabrication. The method involves depositing a thin layer of non-doped silicon over the bottom electrode and insulating material, and then converting the silicon layer to a silicon nitride compound by thermal nitridation using a nitrogen-containing gas (NH3). A silicon nitride layer is then deposited to a desired thickness. A disadvantage of this method is that it requires multiple steps to achieve a uniform nitride layer. The deposition of a very thin silicon nitride layer is very difficult to control.
Therefore, it would be desirable to develop a process of forming a cell nitride layer in a capacitor construction that overcomes such problems.
The present invention encompasses methods of forming a uniform cell nitride dielectric layer in a semiconductor fabrication, methods of incorporating such dielectric layers into capacitor constructions, and capacitors formed from such methods.
In one aspect, the invention provides methods of forming a uniform nitride dielectric film layer onto a substrate comprising a nitride resistive material such as BPSG or other insulating material, and a nitride receptive material such as HSG silicon or other semiconductive material or a conductive material (e.g., conductive metal). In one embodiment of the method, a surface-modifying agent is implanted into the exposed surfaces of the nitride resistive (BPSG) layer to modify the surface of the layer so as to enhance nitride nucleation in the subsequent formation of a nitride cell layer. Examples of suitable surface-modifying agents include ionizable nitrogen and silicon species. The subsequent deposition of nitride results in a substantially uniform thickness of the cell nitride layer over the nitride resistive (BPSG) portion and the nitride receptive (HSG silicon) portion of the substrate.
In another aspect, the invention encompasses methods of forming a capacitor. In one embodiment, the method comprises forming a first capacitor plate comprising a nitride receptive material such as a semiconductive material, for example, HSG polysilicon, in a container comprising an insulation or nitride resistive material such as BPSG; forming a cell nitride dielectric layer over the first capacitor plate; and forming a second capacitor plate over the cell nitride layer. The cell nitride layer is formed after implanting a surface-modifying agent such as an ionizable nitrogen or silicon species, by low angle implantation onto the exposed surfaces of the insulation or nitride resistive (BPSG) layer adjacent the capacitor container and at the top portion and corners of the container. Preferably, the substrate (e.g., wafer) is rotated during implantation to ensure uniform implantation of the surface-modifying agent into the insulation layer about the circumference of the top portion of the container, including the corners. The modifying agent alters the surface of the insulation layer to enhance nitride nucleation on the insulation layer in the subsequent formation of a nitride cell layer, and achieve a nitride cell layer that has a substantially uniform thickness over the surfaces of the lower electrode and the exposed surfaces of the insulation layer including over the corners of the container.
In another aspect, the invention provides a container capacitor. The capacitor comprises a container formed in a layer of a nitride resistive material such as BPSG or other like insulating material, a lower capacitor electrode comprising a nitride receptive material such as a semiconductive material such as HSG silicon, an upper capacitor electrode, and a nitride dielectric layer formed intermediate the upper and lower electrodes. In an embodiment of a capacitor according to the invention, the exposed surfaces of the insulation layer comprises an implanted species of ionizable nitrogen, silicon or other suitable surface-modifying agent with the overlying cell nitride layer deposited thereon. The capacitor can be incorporated into a semiconductor circuit, including a DRAM cell.
In another aspect, the invention provides an integrated circuit comprising a memory cell array and internal circuitry, and a capacitor fabricated according to the invention that is in electrical contact with an active area within the substrate of the memory cell array.
Semiconductor devices fabricated according to the present invention with a cell nitride insulating layer formed by implanting a surface-modifying agent into the insulation layer (e.g., BPSG) including the top corner portion of an insulative container, and then depositing a cell nitride layer over the lower electrode (e.g., HSG silicon) and exposed surfaces of the insulation layer, have substantially the same electrical performance as conventional devices and improved Cp-leakage performance over a device made with a cell nitride layer alone without the use of a surface-modifying agent as described herein. Also, with the implantation of a surface-modifying agent into the insulation material, the subsequent nucleation and deposition rate of the nitride material upon the different silicon materials (e.g., HSG polysilicon, BPSG) is substantially equivalent regardless of the material. This alleviates the problem of different or degraded electrical characteristics that result from the differences in the nitride thickness deposited on adjacent surfaces, and particularly the corners of a capacitor container that may comprise BPSG. Such differences are especially apparent, for example, between a conductor composed of HSG polysilicon and an insulator composed of BPSG, where a relatively thin nitride layer deposited at an HSG polysilicon/BPSG edge (e.g., container corner) can result in degraded electrical properties at that edge and for the resulting fabricated device.
The use of the present process of depositing a cell nitride layer also resolves the fatal bubbling and punch-through problems that occur with nitride layers that are deposited directly on insulative substrates in semiconductor devices. In addition, implantation is a well-known technology that is scalable and works well in connection with the trend toward shrinkage of capacitor containers and other semiconductor structures. The invention also allows cell nitride thickness to be scaled down below 50 angstroms and function to prevent xe2x80x9cpunch throughxe2x80x9d problems. The thick nitride layer that is deposited by the method of the invention at the top portion of the insulative (BPSG) container at its confluence with the lower (HSG silicon) electrode can avoid problems of top and bottom electrode shorts or high leakage which will increase the reliability of the device.